Tapeless paper motion control system providing sensing circuits to govern motor incrementing

ABSTRACT

An improved tapeless format control system for a line printer is provided which will control the pitch between printed lines on various length web paper forms. The system includes a stepping motor for driving a paper advance mechanism, a manually operated shift mechanism for selecting the desired one of a plurality of form lengths, and a plurality of photo cells and light sensing devices associated with the stepping motor, the paper advance mechanism and the form length selecting mechanism, the photo cells and sensing devices cooperating with logic circuitry in response to two different types of spacing instructions to provide a wide variety of printing formats on a variety of form sizes to thereby assure optimized flexibility in printing with the line printer, the logic circuitry including a speed retarding device for the stepping motor and a device for checking forward incrementing of the motor using gray code.

llnite Hoffman et a1.

[451 Dec.31,1974

[ 1 TAIPELESS PAPER MOTION CONTROL SYSTEM PROVIDING SENSING CIRCUITS TOGOVERN MOTOR INCREMENTING [75] Inventors: Paul R. Hoffman, Farmington;

Roger S. Naeyaert, Warren, both of [2]] Appl. No.: 396,353

[52] U.S. Cl. 197/133 R, 74/348 [51] Int. Cl ..1B41j 15/04 [58] Field ofSearch 197/84, 133 R, 127; 74/337, 337.5, 341, 348

[56] References Cited UNITED STATES PATENTS 774,910 11/1904 Crawford74/348 X 1,206,043 11/1916 Slonecker 74/348 2,842,246 7/1958 Furman etal.... 197/133 R 3,123,195 3/1964 Hewitt et a1. 197/133 R 3,499,5163/1970 Schaaf 197/133 R 3,502,190 3/1970 Smith 197/133 R 3,557,9291/1971 Schaaf 197/133 R 3,643,039 2/1972 Barcomb et a1.. 197/133 R3,656,041 4/1972 Bonzano 197/133 R 3,761,000 9/1973 Hagstrom l97/l33 R XFlELD 1 LlNE I64 FIELD 70 DECODER riage Control, Kerr et al., Vol. 13,No. 3, August, 1970, PP- 57-658.

Primary Examiner-Robert E. Pulfrey Assistant Examiner-Edward M. CovenAttorney, Agent, or Firm-Edwin W. Uren; Edward G. Fiorito; Paul W. Fish[57] ABSTRACT An improved tapeless format control system for a lineprinter is provided which will control the pitch between printed lineson various length web paper forms. The system includes a stepping motorfor driving a paper advance mechanism, a manually operated shiftmechanism for selecting the desired one of a plurality of form lengths,and a plurality of photo cells and light sensing devices associated withthe stepping motor, the paper advance mechanism and the form lengthselecting mechanism, the photo cells and sensing devices cooperatingwith logic circuitry in response to two different types of spacinginstructions to provide a wide variety of printing; formats on a varietyof form sizes to thereby assure optimized flexibility in printing withthe line printer, the logic circuitry including a speed retarding devicefor the stepping motor and a device for checking forward incrementing ofthe motor using gray code.

42 Claims, 13 Drawing Figures PATENTEI] DEC 3 1 I974 SHEEI 10F 8PATENTEU m3 1 I974 SHEET 2 BF 8 PATENTED BEECH I974 SHEET 7 OF 8 FIG.9A.

STEP

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8. 5=BRAKING CIRCUIT ACTIVATION POINT ITT.

C. COMMON HOME POSITION I73.

TAPELESS PAPER MOTION CONTROL SYSTEM PROVIDING SENSING CIRCUITS TOGOVERN MOTOR INCREMENTING CROSS REFERENCE TO A RELATED APPLICATION Thepresent invention related to and represents an improvement over thetapeless format control apparatus described and claimed in a patentapplication entitled A Tapeless Format Control System by Paul R.Hoffman, such application, also assigned to the assignee of the presentinvention, having been filed on June 1, 1973 and assigned Ser. No.366,122.

FIELD OF THE INVENTION The invention relates generally to a formatcontrol system for line'printers and more particularly to a tapelessformat control system for controlling the advancement of web paper in aline printer.

BACKGROUND OF THE INVENTION As pointed out in connection with thedisclosure of the above-referenced patent application, Ser. No. 366,122,many prior art printing systems make use of prepunched paper tape loopsto control the spacing and arrangement of printed information on paperforms. Such loops are generally provided with rows and columns ofmachine readable apertures which represent spacing and formattingcontrol instructions, the tapes being selectively and individuallyinstallable in tape sensing devices in the printer where they areadvanced in synchronism with the advancement of the web paper. Duringthis synchronized advancement of the tape loops, the apertures thereinare sensed by sensing means, whereupon pulses resulting therefrom aretransmitted through appropriate circuitry to the web paper advancingmeans of the printer, the web paper advancing means being therebycontrolled from a starting and stopping standpoint to produce thedesired .ar rangement of the printed information on the web paper forms.The control instructions represented by the apertures in the tape loopsare generally combined with line selection instructions transmitted tothe printer from a central processor or other extraneous control device.

Format control tapes of the kind commonly used in prior art lineprinters, and in format control apparatus forming a part thereof, havegenerally been characterized by two different categories of problems, afirst category involving the operational characteristics of theapparatus used for sensing and advancing the tapes, and the secondcategory involving the condition and storage requirements of the tapesthemselves. Prominent among the first category of problems are theinertial tendencies of prior art tape advancing apparatus, suchtendencies frequently causing the start-up or stopping motion of thetape to either lag behind or to run ahead of the starting or stopping ofweb paper motion, thereby giving rise to the disruption of the requiredsynchronization between the tape and the web paper. Included in thesecond category of problems, involving the tapes themselves, are theneed of maintaining space-taking tiles for storing a plurality of tapesthat are not in active usage, the tendency of the tapes to become wornand dilapidated through excessive use or misuse, and the likelihood oferror in either punchably producing the tapes or in effectinginstallation thereof in the tape sensing and advancing apparatus.

An additional problem common both to line printers using and those notusing carriage control tapes is that of oscillatory motion of the webpaper about the area of the new line position. The closer the lineadvancing mechanism is to running in a "slew" condition before it isstopped at the new line position, the more pronounced the problem ofoscillatory motion becomes.

A further problem particularly relevant to line printers using steppingmotors as paper advancement drive units is that of knowing whether therequired forward incrementing of the paper has been experienced,according to instruction, or whether single increments of back steppinghave occurred. Here again, the tendency to back step or to non-step isaggravated when the paper advancement mechanism approaches a slewcondition.

SUMMARY OF THE INVENTION It is accordingly an object of the presentinvention to provide a tapeless format control system for use in highspeed line printers, such system being completely reliable in operationand ideally flexible in its ability to produce the desired formatting ofprinted information on any desired form length.

It is another object of the present invention to provide an improvedtapeless format control system that will facilitate bringing the webpaper advancement mechanism of the line printer from a high speedcondition to a controlled stop at a new line position.

Still another object of the present invention is to provide an improvedtapeless format control system wherein incrementing of a stepping motoris fully controlled and wherein precise execution of a previous spacinginstruction is a prerequisite to the execution of a new spacinginstruction.

The present invention is directed to a tapeless format control systemfor use in line printers, such system in cluding a stepping motor forincrementally advancing the web paper, means for selectively determiningthe length of the paper form upon which the printed information is to bearranged, means for controllably retarding the web papers advancement asit approaches a new line position, a plurality of pulse generating meansfor identifying each increment of motion of the step ping motor, eachincrement of advancement of the web paper, and the passage of each unitof selected form length past the print station, means for comparing theprevious position of the stepping motor with its present position so asto allow further incrementing of the stepping motor only when thepreceding incrementing step has been successfully completed, means alsobeing pro vided for receiving and storing skip and line advance spacinginstructions from a centralprocessor, and for controllably coordinatingsuch extraneous instructions with said plurality of identifying pulsessuch that each line of information printed on the selected form lengthis properly spaced from the preceding lines and all of the lines ofprinted information conform to the prese lected format represented bythe extraneous instructions.

BRIEF DESCRIPTION OF THE DRAWING These and other objects and advantagesof the invention will become apparent from the following descriptionwhen read in conjunction with the accompanying drawing figures, inwhich:

FIG. 1 is a partial perspective view showing various of the elements ofthe inventive format control system in association with web paperadvancing means in a line printer;

FIG. 2 an elevational view of various of the elements shown in FIG. 1;

FIG. 3 is a view taken in the direction of the arrow 3 of FIG. 2;

FIG. 4 is a schematic block diagram illustrating the logic circuitry ofthe inventive format control system;

FIG. 5 is a plan view of the adjustable dials shown in FIG. 1;

FIG. 6 is a view of a portion of the continuous web paper used in theline printer, separable form sheets thereof being represented byperforated lines and representative printing lines thereon beingidentified by a plurality of broken lines;

FIG. 7A is a schematic component diagram illustrating the sensingcircuit of the inventive format control system;

FIG. 7B is a schematic component diagram illustrating the step counterand compare unit circuits of the inventive format control system;

FIG. 7C is a schematic component diagram illustrating the motor controlunit of the inventive format control system;

FIG. 8A illustrates the gray code as it appears on the slotted motorstep disk;

FIG. 8B is a table of the gray codes in binary form for one revolutionof the slotted motor step disk;

FIGS. 9A and 9B represent a table of the coded counting sequence for thestep counter as it counts down from a given initialized position,representing a line instruction, to a common home position.

DESCRIPTION OF THE PREFERRED EMBODIMENT The inventive tapeless formatcontrol system is comprised of a stepping motor for incrementallyadvancing the web paper, means for selectively determining the length ofthe paper form upon which the printed information is to be arranged, aplurality of pulse generating means for identifying each increment ofrotational motion of the stepping motor, each increment of advancementof the web paper, and the passage of eah unit of selected form lengthpast the print station, means for receiving and storing externallyoriginated skip and line advance spacing instructions, and means forcontrollably coordinating the skip and line advance instructions withthe plurality of identifying pulses such that each line of informationprinted on the selected form length is properly spaced from thepreceding lines, the latter coordinating means including means forcontrolling the incrementing of the stepping motor such that eachforward step is dependent upon the successful completion of thepreceding step, and means for retarding the speed of the stepping motoras it approaches a selected print position such that paper advancementis brought to a precise stop. Each of these broadly defined elements ofthe inventive format control system will be hereinafter described from astructural and functional standpoint, with reference to the accompanyingdrawing figures.

As illustrated in FIGS. 1 and 4, a stepping motor 16 fixed to theframework (not shown) of a line printer is provided with anincrementally rotatable motor shaft 20 to the outermost extremities ofwhich are fixed a photocommutator disk 18 disposed in cooperatingrelationship with a sensing device 22, and a toothed pulley 21 which iscoupled to a predeterminately larger toothed pulley 23 by means of abelt 14. The pulley 23 is fixed to an extremity of a paper advance shaft12 which is provided with fixed and spaced-apart sprockets 10, theextending teeth of the sprockets being coop erably engageable withperforations 13 arranged along the outermost edges of the web paper 24.

The previously mentioned means for selectively determining the length ofthe paper form upon which the printed information is to be arranged iscomprised of a conically configured stack of variously diametered gearsgenerally indicated at 30 in FIGS. 1 and 2, such gears being fixed to ashaft 32 that is journaled in a frame member 34 (FIG. 2). In thepreferred embodiment of the invention, the conical stack of gears 30 iscomprised of a total of eighteen gears ranging in toothed circumferencefrom 17 to 34 teeth, each gear having one additional peripheral toothover its smaller diametered adjoining gear, the smallest diametered l7-toothed gear representing an 8 /2 inch form length and the largestdiametered 34-toothed gear representing at 17 inches form length, eachof the gears therebetween representing different form lengths of halfinch differential. The conical stack of variously diametered gears 30 isoperatively coupled to the paper advance shaft 12 by means of anelongated wide-faced gear 28 fixed to the rightmost extremity of theshaft 12, and a rotatably and translatably supported idler gear 44,rotation of the paper advance shaft 12 by the stepping motor 16 therebyproviding rotational movement to the idler gear 44 and to the conicalgear stack 30. Selection of a given form length within the previouslydefined range of from 8% inch to 17 inches is accomplished by manuallyrotating a dial 41 to bring the indication mark corresponding to thegiven form length (FIG. 5) into alignment with a single mark on a cursor33, rotation of the dial 41 being effective to rotate a supporting shaft59 and a pair of bevel gears 55, 53 (FIG. 1), the bevel gear 53 beingfixed to a suitably supported and normally disposed short shaft 59' tothe other extremity of which is fixed a pinion gear 52. It can be seenfrom FIG. I that the pinion gear 52 is engaged with the linearlyarranged teeth of a rack 46, the rack 46 being translatable on asupporting and retaining base member 48. The rack 46 is provided on itsinnermost extremity with a short mounting shaft (not shown) upon whichthe idler gear 44 is rotatably mounted. It can thus be seen thatrotation of the dial 41 will serve to effectuate a correspondingtranslation of the rack 46, by means of the shafts 59 and 59', the fixedgears -53 and the pinion gear 52, to thereby engage the coupling gear 44with the individual gear of the stack 30 that corresponds to the indexedform length.

As may be suggested by the hereinafter described detenting meansillustrated in FIGS. 2 and 3, the form selection dial 41 may be manuallyrotated only after the conical gear stack 30 has been returned to a homeposition wherein corresponding peripheral teeth of the various gears inthe stack are aligned to enable translation of the coupling gear 44.This home position of the gear stack 30 is defined by the centralcoincidence of a line mark 29 on a home positioning dial 36 relative toa pair of marks 31 on a cursor 33, as best shown in FIG. 5. FIGS. 1 and3 are illustrative of the detenting means effective for preventingmanual rotation of the form selection dial 41 when the gear stack 30 isdisplaced from its above defined home position. This detenting means iscomprised of a locking wheel 38 fixed to the shaft 32, a peripherallynotched or toothed detent wheel 54 fixed to the shaft 59, and a rockablysupported and biased detent arm 42 interposed between the wheels 38 and54. The locking wheel 38 is provided with a concave recess 40 which isconformably aligned with a curved portion 57 of the detent arm 42 onlywhen the dial 36 and gear stack 30 are located in their home positions,such conformable alignment of the recess 40 permitting a spring 58 torock the detent arm 42 such that a projection 56 thereof is displacedfrom its engageable locking relationship with the wheel 54. When thedial 36 and gear stack 30 are displaced from their home positions, aswhen operatively rotated by the wide-faced gear 28 and idler gear 44,the raised concentric surface of the locking wheel 38 serves todepressably hold the detent arm 42 and the projection 56 thereof inengageable locking relationship relative to the notches or teeth in thedetent wheel 54, against the bias of the spring 58.

In accordance with the above description, the selection of a given formlength may be accomplished by first rotating the dial 36 to its homeposition, to thereby align corresponding peripheral teeth of theindividual gears of the gear stack 30 and to enable the spring 58 todisengage the detent arm 42 from the wheel 54, and by then rotating theform selection dial 411 to a position corresponding to the desired formlength, the idler gear 44 being thereby translated into engagedrelationship with the individual gear of the stack 30 that correspondsto the desired form length. It is to be noted that a disconnect clutch35 (FIG. 1) is provided intermediate the paper advance shaft 12 and thewide-faced gear 28 to permit rotation of the dial 36 and gear stack 30without disturbing the position of the shaft 112 or the web paper 24.

The aforementioned plurality of pulse generating means forming a part ofthe present invention includes a double ringed multi-slottedphotocommutator disk 18 fixed to the motor shaft 20 and its associatedsensing device 22, a single-slotted disk 37 fixed to the innermostextremity of the shaft 32 of the previously defined form lengthselecting means, along with its associated sensing device 39, and amulti-slotted disk 26 fixed to the paper advance shaft 12 intermediatethe disconnect clutch 35 and the wide-faced gear 28, the disk 26 beingassociated with a sensing device 25. Each of the sensing devices 22, 25and 39 is provided with a well-known light emitting element or photocell disposed on one side of its associated slotted disk, and a lightsensitive switch disposed on the other side of the disk, such elementsbeing effective for pulsably sensing the passage of a slot therebetween.As best shown in FIG. 8A, the double ringed multi-slottedphotocommutator disk 18, identified hereinafter as the motor step disk,is provided with 24 equally spaced-apart coded positions in gray codeper ring where the coded positions contain up to 112 slots per ring andthe multi-slotted disk 26, identified hereinafter as the field markdisk, is provided with 16 equally spaced-apart radial slots. In thepreferred embodiment of the invention, each ring of coded positions ofthe motor step disk 18 is operatively sensed by its own photo cell andassociated light sensing switch or sensor 27 of the sensing device 22,thereby providing for the generation of up to 24 codes per ring for eachrevolution of the motor shaft 20, each of such codes (resulting from thepresence or absence of a slot) representing an incremental step of motorshaft movement equal to a 15 angular displacement thereof. Thepredetermined relative diameters of the motor shaft pulley 21 and thepulley 23 of the shaft 12 are such that each 15 increment or step ofmotor shaft movement will produce 1/120 inch of web paper advancingmovement, a complete revolution of the motor shaft thereby producing 1/5inch of paper advancement. In the preferred embodiment, also, thediameters of the sprockets 10 on the paper advance shaft 12 have been sopredetermined that one revolution of "the shaft 12 will produce 8 inchesof paper advancement. It can thus be seen that each of the 16 pulsesgenerated during each revolution of the paper advance shaft 12, by areason of the 1 6-slotted field mark disk 26 fixed thereto, will serveto represent and to identify a one-half inch incremental advancement ofthe web paper. It will also be apparent from FIG. 1 that thesingle-slotted forms index disk 37 will generate a pulse upon eachoccurrence of the gear stack 30s advanceable return to its homeposition, such pulse accordingly representing and identifying theadvancement of each unit of the selected form length.

The previously mentioned means for receiving and storing skip and lineadvance spacing instructions from a central processor is comprised ofthe shift register 64 shown in FIG. 4, such register consisting of afive-digit field advance instruction portion and a four-digit lineadvance instruction portion, the five digits of the field instructionportion representing the binary decimal dig its 11, 2, 4, 8 and 16, andthe four digits of the line instruction portion representing the binarydecimal digits 1, 2, 4 and 8. It will thus be seen that the fieldinstruction portion of the register 64 will be effective to receive andstore 32 separate codes to provide for onehalf inch incrementaladvancements of the web paper, and that the line instruction portionwill be effective to receive and store 16 separate codes to provide forvarious one one-hundred-twentieths lIllCh incremental ad vancements ofthe paper, the latter incremental advancements being explainedhereinafter in connection with the previously mentioned broadly definedmeans for controllably coordinating the skip and line advanceinstructions with the plurality of identifying pulses.

FIG. 4 is illustrative of the means for controllably coordinating theskip and line advance instructions stored in the register 64 with theplurality of identifying pulses generated by the forms index disk 37,the field mark disk 26 and the motor step disk 18. A line decoder iscoupled to the line instruction portion of the register 64 by lines 72,and coupled also to an encoder 94 by a plurality of lines 92. It is thefunction of the line decoder 90 to interpret and give meaning to the 16possible codes received and stored in the line instruction portion ofthe register 64. The following table is suggestive of how these 16 codesmight be interpreted:

Code Decoded lnstruction No advance Single space lO-per-inch (S) Singlespace 8-per-inch (S8) Single space 6-per-inch (S6) Double spacelO-per-inch (D10) Double space 8-per-inch (D8) Double space 6-per-inch(D6) Triple space lO-per-inch (T10) Triple space 8-per-inch (T8) Triplespace 6-per-inch (T6) Skip to Heading Skip to Bottom Remaining codes maybe utilized for other desired line spacing instructions. such as fourspaces at 6-per-inch, and six spaces at 8-perinch, etc.

The encoder 94, which as previously mentioned is coupled to the linedecoder 90 by a plurality of lines 92, functions to compute the numberof one one-hundredtwentieths inch steps of the stepping motor 16 thatwill be required to produce the desired line spacing represented by theparticular code stored in the line instruction portion of the register64 and interpreted by the line decoder 90, the computed value being thenentered in a step counter 100. The following table will serve to reflectthe number of 1/120 inch steps of the stepping motor that will berequired to satisfy the various line spacing instructions interpreted bythe line decoder 90.

In addition to the register 64, the line decoder 90, the encoder 94, andthe step counter 100, the previously mentioned means for controllablycoordinating the skip and line instructions with the plurality ofidentifying pulses also includes a field mark counter 76, a fieldcompare unit 70, a compare unit 98, a motor control unit 66, and asensing circuit 122 the function of which will be hereinafter described.It is to be noted from FIG. 4 that the field mark counter 76 is coupledto the forms index disk 37 and its associated sensing device 39 by aline 75, and to the field mark disk 26 and its associated sensing device25 by a line 74, and that the field compare unit 70 is coupled to thefield instruction portion of the register 64 by a plurality of lines 68,and coupled also to the field mark counter 76 by lines 78.

The field compare unit 70 is coupled to a motor stop and detent control114 by a line 80, through a pair of NAND gates 84. The field compareunit 70, in addition to being coupled to the motor stop and detentcontrol 114, is also coupled to a flip flop 168 (FIG. 7A) of a SensorSensing Circuit 122 and the step counter 100 by a line 82. It can beseen from the above described couplings of the various elements that thefield mark counter 76 is reset by each pulse generated by the formsindex disk 37 and transmitted along the line 75, and is countablyadvanced by each pulse generated by the field mark disk 26 andtransmitted along the line 74. It will be apparent that the fieldcompare unit will function to continuously compare the accumulated countin the field mark counter 76 with the binary coded instruction stored inthe field instruction portion of the register 64, and will transmit asignal indicating a true state along the line 80 to the NAND gates 84,and along the line 82 to the flip flop 168 of a Sensing Circuit 122,whenever an equals or true state is detected therein.

The step counter is coupled to the motor step disk 18 and its associatedsensing device 22 through the sensing circuit 122. The sensing circuit122 as shown in FIG. 7A is comprised of a sensor gating circuit 124, asensor storage circuit 126, a sensor compare circuit 128, and a pulsegenerator circuit l30l32. The purpose of the sensing circuit 122 is toallow the stepping motor 16 to increment only after successfully completing the previous increment of one forward step. Using signals on line134 of the gating circuit 124 gained by sensing of the gray-coded slotson the motor step disk 18, combined with the stored signals on line 136from the storage circuit 126, resulting from the previously sensed graycoded slots, will give a comparison signal on line 138 indicating acorrect increment that will be unique to 60 of rotation of the motorstep disk 18 in either direction. If there is an error condition, thesensing circuit 122 will not allow the stepping motor 16 to continue torotate until a correct sensor comparison is made by the sensor comparecircuit 128.

The sensor gating circuit 124 receives the separate gray coded signalsgenerated by the sensing device 22 from the slotted rings A and B of themotor step disk 18. FIGS. 8A and 8B show the gray coded slit arrangementof disk 18, and a table of the gray codes, respectively; inthesequential order in which they will cyclically appear on the disk 18.These A" and B signals on lines 101 and 101 respectively (FIGS. 4 and7A) are further subdivided into lines 140 (FIG. 7A) for signal A on,signal A off, signal B on", and signal B of by means of the lines andNAND gates of circuit 142. An additional plurality of NAND gates 144 areincluded using signals on lines 146 from the above subdividing circuit142 as inputs to provide a unique signal on lines 134 for anycombination of the A and B gray coded signals being sensed.

Another function of the sensor gating circuit 124 is to allow thesubdivided signals on line 140, before printing is to begin, toinitialized on lines 150 the flip flops 152 of a sensor storage circuit126 through a series of NAND gates 148, whenever the skip controlcircuit is enabled on line 96. Thus the electronics of the formatcontrol system will start out in sync with the stepping motor 16.Whatever gray coded position the motor step disk 18 is in at systemstart up time will be recorded in the sensor storage circuit 126.

The flip flops 152 of the sensor storage circuit 126 will be triggeredby a signal on a line 154 from the pulse generator circuit 130l32 everytime a correct increment of the stepping motor 16 has been made and areso interconnected so as to have the immediately previously sensed graycoded signals as their respective states. The direct outputs on lines156, 156, 156", 156" from these flip flops 152 are used as bias signalsfor the run and full-brake" functions of the motor drive unit 66 to beexplained hereinafter. Also, the outputs on lines 158 from flip flops152 are gated in circuit 160 so that all possible combinations of two oftheir outputs may be represented by one unique signal on lines 162,162', 162", 162', corresponding to previously sensed A and B gray codedsignals as placed in the sensor storage circuit 126. Thus only one ofthese four sets of gates in circuit 160 will output at any given time onlines 162, 162, 162", 162". These combined signals on lines 162, 162,162", 162" are used in the motor control unit 66 for stop and brake-stepbiasing and additionally as inputs to the sensor compare circuit 128 aswill be later explained.

The sensor compare circuit 128 functions to compare the sensor gatingcircuit signal on lines 134 representing the presently sensed gray codedsignal with the sensor storage signal on lines 162, 162', 162", 162'representing the immediately previously sensed gray coded signal. As anexample of such comparison, with reference to FIGS. 8A, 8B and 7A, ifthe sensor storage ;u .t.1l ha a s nal A of n a s a B of stored in itrepresenting the immediately previously executed slot position, then thesensor gating circuit 124 o ldta ss t y be rss v ss a g al A of O and asignal B of 1 on lines 101 and 101 respectively in order for the sensorcompare circuit 128 to output a signal on line 138. When the presentlysensed signal is one step forward of the previously sensed signal thenthe sensor compare circuit 128 will output a signal indi eating a goodcompare.

The pulse generator circuit 130-132 (FIG. 7A) serves as the source oftrigger pulses for the flip flops 152 of sensor storage circuit 126(along the line 154), and for the step counter 100 and the compare unit98 (along line 170). The triggering input for the first stage 130 of thepulse generator circuits l30-132 itself is the clock of the centralcomputer processor coming in on line 164 in the preferred embodiment.The bias for the first stage 130 of the pulse generator circuit l30132is received from the sensor compare circuit 128 on line 138. Since thetrigger rate of the central processor clock is very much higher than thesensor compare circuit bias rate, as it is applied, the sensor comparecircuit 128 bias application rate becomes defacto the pulse generator130-132 circuit output trigger rate. The flip flops and associated NANDgates of the first stage 130 of the pulse generator circuit 130-132 willthus output trigger pulses to the second stage 132 of this circuit130-132 on line 166, and also to the sensor storage circuit 126 on line154, whenever a correct increment of the stepping motor 16 has beenmade, whether in execution of a field or line instruction. It will benoted that the flip flops of this first stage 130 may be reset by a skipcontrol signal on line 96. A flip flop 168 and associated NAND gates ofa second stage 132 of the pulse generator circuit 130-132, on the otherhand, will only begin outputting triggering pulses upon receipt of atrigger pulse on line 166 from the first stage 130 and also of aninitializing signal from the field compare 70 on line 82. It will benoted that the flip flop 168 is always grounded to its low state exceptwhen a line instruction is to be executed, at which point it istriggered by the first stage 130 and biased by a signal on line 82 toits high state to thereby output a signal on line 170. It will be notedthat a signal on line 82 will only be present upon completion of a fieldinstruction. The flip flop 168 will be reset back to its low stateeverytime a new signal is sent on line 61 to the register 64. The signalappearing on line 82 indicates completion of a field instruction and thepermissive beginning of a line instruction. The pulse outputted on line170 by the second stage is used to trigger the step counter 100 and alsothe braking circuit 180 of the compare unit 98 as will be explainedhereinafter.

The step counter 100 of this system, as illustrated in FIG. 7B, is a sixstage binary counter consisting of flip flops FF-l, FF-2, FF4, FF-8,FF-16 and FF-32 going from low to high stages respectively, such counterhaving been designed to count down to a home position 173 in a binarymanner as shown in the table in FIGS. 9A and 98. At the beginning of aline instruction, the step counter 10 will be set by the encoder 94 online 95 to whatever number of steps are required to accom plish the lineinstruction given in the register 64. Thus if 88-10 is desired as a lineinstruction, the step counter will be set to (011110) which isequivalent to 12 steps as shown at 171. As the stepping motor 16 beginsincrementing for the line instruction, the step counter 100 will begincounting down at one count per completed step until the counter 100reaches (101010) which is the common home position shown at 173 for allline settings of the counter 10'[), at which point the stepping motor 16will look into its stop position. The step counter 100 is reset to azero state every time a signal appears on line 102, which is every inchof paper advance as recorded by the sensing device 25. The encoder 94,on the other hand, is always outputting a setting signal on line 95.Thus at the beginning of an exe cution of a line instruction, thestepping counter 100 will be reset to zero by a signal on line 102.Next, initializing NAND gates 172 coupled to the line 95 will outputcontrol signals on lines 174 for the brief instant when an input signalis received on line 82 from the field compare 70, an input signal fromthe first stage is received on line 166, a low state signal from flipflop 168 is received on line 176, and encoder 94 signals are received onlines 95 such signals being received simultaneously to thus initializeon line 174 the step counter 100 to a value corresponding to the desiredcurrent line instruction as represented at 175 in FIGS. 9A and 9B.

As the step counter 100 is triggered by the pulse generator circuit130-132 from its initialized line position to its home position, thecompare unit 98 continuously samples the state of the step counter 100on lines 99 and 99' and outputs function signals on lines 114, 114, 114", 114" to the motor control unit 66 reflecting the current step beingprocessed. The step counter 100 outputs are NAND gated, up through twodistinct NAND trees 178 and 180 of the compare unit 98, the first tree178 for controlling the stop and run" functions through stop and runcontrol signals on output lines 114 and 114' respectively of thestepping motor 16, and a second tree 181 for controlling the brakingcircuit 180 of the stepping motor 16. At the top or output point of thefirst NAND tree 178, there are two separate output lines, one for stopon lines 110 and 114, and one for run on line 114' (FIG. 7C). In thetime interval between the time the step counter 100 is initialized andthe time at which the step counter 100 reaches its home position, therun signal along line 114' may be activated to merely indicate anabsence of a stop signal on line 110, which in turn means that the homeposition has not yet been reached by the step counter 100,

thereby allowing the stepping motor 16 to continue to increment. Oncethe step counter 100 has reached its home position (101010) in FIGS. 9Aand 9B, the stop signal on line 114 will be outputted to disallow anyincrementing by the stepping motor 16. The stop signal on line 110 willcontinue to be outputted until the step counter 100 is reset to zero bya signal on line 102. The stop signal on line 110 is inputted intogating circuitry 179 (FIGS. 4 and 73) where the stop signal on line 110is inputted to NAND gates 84 as is the field compare completion signalon line 80. Concurrent receipt of these signals will cause NAND gates 84to output a motor stop and detent control signal on line 114 to themotor control unit 66.

At the top or output point of the second NAND tree 181 (FIG. 7B), asignal outputted on line 182 by the final NAND gate in the tree willindicate that the stepping motor 16 is five steps away (010001) from itshome position (101010) as determined from the outputs of the stepcounter 100. The signal outputted by the second tree line 182 is usedfor biasing the high input side of its associated flip flop 184. As thisflip flop 184 is triggered by the high frequency central processor clocksignal on line 164 (as was the first stage 130 of pulse generatorcircuit 130-132), application of bias by line 182 to the flip flop 184will cause it to be almost immediately switched to its high state. Asthe low input side of the flip flop must receive a signal through anassociated NAND gate that is the complete truth negation of the highinput side signal in order to change its state, the flip flop then willonly be triggered back to its low side upon a zero reset signal on line102 as used by the step counter 100. The net result of this is that oncethe flip flop 184 has been set to its high side, it will stay there forthe last five steps leading to the home position of the stepping motor.Once the flip flop outputs a signal on line 186 from its high side, aconnected NAND gate 188 will deliver this signal to a point having acommon terminal with the run signal line 114, thereby effectivelycancelling the run signal when both are preset, the significance ofwhich will be described more fully hereinafter. An additional NAND gate188' is supplied with an input common to NAND gate 188 and whoseinverted output is used to cancel any premature lock or stop signals online 110 as a result of residue currents in the first NAND tree 178.Five steps away (177 in FIGS. 9A and 9B) from the home position waschosen as the maximum number of steps that the braking circuit 180requires to controllably retard the speed of the stepping motor 16 toprevent any overshoot or oscillation over or about the home positionrespectively. The braking circuit 180 in this embodiment comprises adelayed multivibrator (DMV) 183 and associated NAND gates for outputtinga brake step function signal on line 114" and a full brake functionsignal on line 114'. The DMV 183 is biased by a signal on line 186 fromthe high side of flip flop 184. Once so biased, the DMV 183 will outputa signal on line 194 upon receipt of a triggering pulse on line 170 fromthe second stage 132 of the pulse generating circuit 130-132 whichcorresponds to the beginning of each of the last five steps mentionedabove. The adjustable period of the output signal on line 194 from thedelayed multivibrator 183 will never be any longer than the shortestanticipated interval between increments of the stepping motor 16, or inother words, the fastest expected speed of the motor 16.

The output signal on line 194 from the DMV 183 will be inverted andshaped by an operatively coupled NAND gate 192 to become what is calleda Full Brake Signal on line 114" (FIG. 7C) which is actually a reverserun signal in that the windings of the stepping motor 16 are excited ina mode reverse to that of the normal run mode, thereby giving a brakingeffect to a forward moving stepping motor 16 when activated. As thestepping motor 16 begins to slow down as a result of the cancelling ofthe run signal on line 114", and application of the full brake" signalon line 114", the DMV 183 for a given adjustable output period, willbegin to time out or be off for increasingly longer periods near the endof each step as the stepping motor 16 increments closer to the homeposition. This effect is taken advantage of by also feeding the outputof the DMV 183 into its second series of associated NAND gates 190.These NAND gates 190 will be activated to output a signal on line 114"whenever concurrently the DMV 183 is not outputting a signal on line 194and the flip flop 184 is outputting a signal on line 186. The sig naloutputting outputted by NAND gates 190 on line 114 is called a brakestep and is used to power the stepping motor 16 in a manner similar tothe run signal on line 114' except that only one of the four motorwindings of the stepping motor 16 are excited at any given time. Thepurpose of this being to power the stepping motor 16 forward at arelatively low speed for increasingly longer periods as home position isapproached, so that the stepping motor 16 is neither over orundershooting its home position. Once the home position is reached bythe stepping motor 16, the first NAND tree 178 will become true and astop signal on line will output to stop and lock the motor 16 in place,that is, the stator and rotor windings of the stepping motor 16 havinglike phases will line up with each other. The stop signal on line 110through a NAND gate 196 will also cancel the full-brake signal on line114" if there happens to be any residue left as outputted by the DMV 183on line 194 when home position is reached, thereby preventing thestepping motor from backing away from home position. As can be seen fromthe above, the full-brake signal on line 114" will preempt the runsignal on line 114', likewise the stepbrake signal on line 114 willpre-empt the full-brake signal on line 114', and finally the stop signalon line 110 will pre-empt the brake-step signal on line 114'. In effect,the above function signals are exclusive ORed in that only one of themmay be present at any given time.

The motor control unit 66 illustrated in FIG. 7C and consisting ofgating and drive circuitry 199 will receive the function signals 114,114, 114", 114" from the compare unit 98 and gate them with bias signalsfrom the sensing circuitry 122. The result being that the direct biassignals on lines 156, 156, 156", 156", and combination bias signals onlines 162, 162., 162", 162" will indicate which phases of the four phasestepping motor 16 are available for performing the desired function atthat point in time. The gating and drive circuitry 199 will allow onlythose phase windings having a concurrence of bias and function signalsto be energized. Specifically, the gating and drive circuitry 199 issubdivided into four identical sets of NAND gates and drive units 198,198', 198", 198", corresponding to the first, second, third and fourthphases respectively of the motor. Each of the sets of gates and driveunits 198,

198', 198", 198", in turn, is provided with four identical NAND gatesORed together and corresponding to the four possible function signalsoutputted by the compare unit 98, namely, run, stop, full brake and stepbrake. Each of the NAND gates of a set, if it is to output, must have afunction signal from the compare unit 98 and a biasing signal from thesensing circuit 122. Thus, if the function desired is run or fullbrake",then two different direct biasing signals on line 156, 156, 156", or156" must be gated with the run or full-brake signal on lines 114' or114" respectively in two different sets consisting of 198, 198,198" or198" because the stepping motor 16 is designed to run or full-brake in atwo phase mode. Additionally, the run signal on line 114, must be gatedwith a signal on line 62 indicating the presence of an instruction inorder for the gate to be enabled. Likewise, if the function desired isstep brake or stop, then one combination biasing sig nal on lines 162,162, 162", or 162" from the flip flops 152 must be gated with thestep-brake or stop signals on lines 114 or 114 respectively in one ofthe sets consisting of 198, 198, 198" or 198" because the stepping motor16 may only step-brake or stop in a one phase mode. Once a function NANDgate in a set has been activated, in a set consisting of 198, 198, 198"or 193", it will output a control signal on line 200, 200, 200" or 200"to its associated drive unit consisting of 202, 202, 202", or 202"respectively for that phase depending on the phase it is in. A driveunit con sisting of 202, 202', 202 or 202", upon being switched on bysuch a control signal on line 200, 200, 200 or 200" will energize anassociated winding of the stepping motor 16 through line 204, 204',204", or 204" respectively to perform the desired function, be it run,stop, full brake or step brake.

A skip control unit 65 also shown in FIG. 4 is provided to enableslewing or skipping of the web paper in the absence of a field or lineinstruction code from the central processor along the line 61. A pushbuttonswitch 63 coupled to the skip control unit 65 is manually operableto activate the stepping motor 16 along the line 62, an input beingcoincidentally transmitted along the line 96 to the NAND gates 118 andthe step counter 100 to thereby reset the step counter and to initializethe circuitry 172 thereof. This manually initiated slewing willterminate when an enabling input signal is transmitted to the NAND gates118 along the line 116, as generated by the forms index disk 37 uponarrival of the gear stack 30 at its home position, a stop pulse beingthus passes and ORed to the motor stop and detent control 114. The NANDgates 118 also serve to activate the motor stop and detent control 114in the normal execution of a Skip to Heading instruction (binary code1010 stored in the line instruction portion of the register 64), theline decoder 90 in such instance transmitting an input along the line120 to the NAND gates 118, such gate being enabled upon receipt of aninput along the line 116 upon arrival of gear stack 30 in its homeposition, it being apparent that the home positions of the gear stack 30and the forms index 37 would represent the heading of the succeedingform. Operation A full understanding of the operation of the inventiveformat control system is hereinafter conveyed with reference to FIG. 4,an initial phase of such explanation being of a generalized nature notinvolving the use of specific skip and line instruction codes, and asubsequent phase thereof describing how representative instruction codeswould be utilized to effectuate printing on specified print lines.

It is to be noted before proceeding with this explanation that the fieldmark counter 76 is reset only at the beginning of each unit of selectedform length, when the forms index disk 37 transmits a pulse theretoalong the line 75, and that the step counter 100 is reset at thebeginning of each one-half inch increment of paper advancement, when thefield mark disk 26 transmits a pulse thereto along the line 102. It isaccordingly also to be noted that the field mark counter 76 willaccumulatively count a pulse from the disk 26 for the passage of each /2inch vertical printing area on the selected form length, and that thestep counter 100, when enabled by the flip flop 168, will count up to 60one onehundred-twentieths inch increments of paper advance ment betweensaid /2 inch printing areas.

Upon setting the dials 36 and 411 (FIG. 1) to select a desired formlength (between 8 /2 inches and I7 inches in the preferred embodiment),a pulse is generated by the home positioned form index disk 37 tothereby reset the field mark counter 76, and to transmit an input pulsealong the line 116 to the NAND gates 118, the step counter 100 havingalready been reset by the preceding pulse from the field mark disk 36.Upon receipt of a field instruction code (other than 00000) in thefive-digit field instruction portion of the register 64, along the line61, (and with a 0000 code in the line instruction portion of theregister) the motor 16 is activated to rotate the motor step disk 18 andthe paper advance shaft 12, rotation of the shaft 12 being effectivealso for rotating the field mark disk 26 and the forms index disk 37. Asthe field mark disk 26 rotates, the pulses generated by the radial slotstherein will be counted by the field mark counter 76, each pulserepresenting and identifying a one-half inch increment of paperadvancement. It is to be noted that during this advancement of the webpaper, and counting of the field mark pulses by the counter 76, thepulses generated by the motor step disk 18 will not be counted by thestep counter 100, since the flip flop 168 (FIG. 7A), which wasde-enabled by the new instruction signal on line 61, has not again beenenabled by an input from the field compare unit 7Q along the line 82.When the accumulated count in the field mark counter 76 is equal to thefive-digit field instruction code in the register 64, the field compareunit will transmit an input pulse along the line 80 to the NAND gates84, such gate also having an input from the compare unit 98 along theline 110, by reason of the O-equals state of the step counter 100. Uponthus enabling the NAND gates 84, a stop pulse is transmitted and ORed tothe motor stop and detent control 114 of the motor control 66, the motorbeing accordingly stopped for printing a line of information on theprint line represented by the field instruction code stored in theregister 64.

In the event printing is to occur in the first half inch of the selectedform length, a line instruction code other than 0000 would betransmitted along the line 61 to the line instruction portion of theregister 64 (with a 00000 in the field instruction portion of theregister), whereupon the line decoder would serve to activate theselected line 92 corresponding to such line instruction code, theencoder 94 thereupon computing the number of motor steps of oneone-hundred-twentieth inch each that are required to provide the desiredline spacing, the value computed being entered in the step counter 100.Upon rotational activation of the motor 16, the motor step pulsesgenerated by the disk 18 and the photo cells 22 would be transmittedalong the lines 101 and 101 through the sensing circuit 122, along theline 170, if it is ascertained that a correct step has been made, to thestep counter 100, the flip flop 168 having been enabled by an inputalong the line 82 from the field compare unit 70 by reason of the0-equals state of the field mark counter 76 and the field instructionportion of the register 64. When the count of the step counter 100 isequal to zero (or binary code 101010) representing the home position ofthe stepping motor 16, compare unit 98 would transmit an input stoppulse along the line 110 through the NAND gates 84 to the motor step anddetent control 114, the NAND gates 84 being enabled by the presence ofan input along line 80 from the field compare unit 70, also by reason ofthe 0 equals state of the field mark counter 76 and the fieldinstruction portion of the register 64. Upon activation of the motorstop and detent control 114, the motor 16 would be stopped for theprinting of the line of information on a print line corresponding to theline instruction code.

To effectuate printing beyond the first half inch of space on a selectedform length, and on a print line not corresponding to a one-half inchincrement of paper advancement, a field instruction code (other than00000) and line instruction code (other than 0000) would be transmittedalong the line 61 to the register 64, the field instruction code beinginitially operative to advance the paper to the print line correspondingto the one-half inch increment next preceding the desired print line,and the line instruction code being thereafter effective, withoutstopping the motor, to advance the paper from such preceding /2 inchincrement line to the desired print line. Upon receipt of the spacingcodes in the register 64, the line decoder 90 would be responsive to theline instruction code to activate a selected line 92 to the encoder 94,the encoder 94 thereupon computing the number of 1 120 inch motor stepsrequired to advance the paper from the 76 inch increment linecorresponding to the entered field instruction code to the desired printline, such value being entered in the step counter 100. At the outset ofmotor activation, the step counter 100 would be in a reset state byreason of the preceding pulse generated by the field mark disk 26, andthe field mark counter 76 would contain an accumulated countcorresponding to the recorded onehalf inch increments of previous paperadvancement. Since the field instruction code stored in the five-digitfield instruction portion of the register 64 would be of higher valuethan the accumulated count in the field mark counter 76, the flip flop168 would not initially be provided with an input along the lines 80 and82 from the field compare unit 70, and the motor step pulses generatedby the disk 18 would initially be blocked from the step counter 100. Itcan thus be seen that during the early stage of motor activation, onlythe pulses generated by the field mark disk 26 would be counted (by thefield mark counter 76), an enabling pulse being transmitted by the fieldcompare unit 70 along the line 82 to the flip flop 168 when an equalsstate is detected therein, the flip flop 168 being thus enabled to passthe subsequently generated pulses representative of those generated fromthe motor step disk 18 to the step counter 100 where they would then becounted. When the count of the motor step pulses equals zero (or binarycode 101010), to represent the arrival of the desired print line, thecompare unit 98 would transmit a pulse along the line 110 through theNAND gates 84 to the motor stop and detent control 114, the NAND gates84 having also been enabled by the previously mentioned pulse from thefield compare unit 70, along line 80. The motor would accordingly bestopped at the desired print line for the printing of a line ofinformation.

The following explanation is set forth to illustrate how various fieldinstruction codes and line instruction codes would be utilized in theinventive tapeless format control system to effectuate printing ondesired print lines on a selected form length. With the form select dial41 set on the 14 inch mark as shown in FIG. 5, printing on various lineson a 14 inch form may be explained with reference to FIGS. 4 and 6. Ifafter setting the dial 41 on the 14 inch mark, it is then desired toprint a first line of information on the 5 inch line of the form, thefield instruction code 01010 would be entered in the five-digit fieldinstruction portion of the register 64, and the code 0000 entered in theline instruction portion of the register. During the resultantactivation of the motor 16, the field instruction portion of theregister being greater than the count in the field mark counter 76, theflip flop 168 would not be enabled by an input along the line 82 topermit the step counter 100 to count the motor step pulses generated bythe disk 18, paper advancement continuing until the count in the fieldmark counter 76 is equal to the field instruction code (in this caseboth equaling 10), whereupon the field compare unit would transmit astop pulse along the line 80 through the NAND gates 84 to the motorcontrol unit 66, the NAND gates 84 being enabled by an input from thecompare unit 98 along the line 110 by reason of the zero (or binary code101010) state of the step counter 100. Paper advancement wouldaccordingly terminate with the 5 inch line of the form in printingposition.

1f after printing the line of information on the 5 inch line, it werethen desired to print four lines of information in S10 spacingimmediately following the 5 inch line, the codes 01010 and 0001 would beentered in the field instruction and line instruction portions,respectively, of the register 64 for each of the desired four lines ofprinting. With the 0001 code in the line instruction portion of theregister 64, the line decoder would activate the S10 line 92 to theencoder 94, whereupon the encoder 94 would compute and transmit to stepcounter a unique value for each of the four lines of printing, suchvalues, representing the separately accumulated number of H120 inchmotor steps required to produce each of the four lines of S10 spacing,being 12 steps for each line in this case. With the field mark counter76 and the field instruction portion of the register 64 both being in aIO-equals state, the flip flop 168 would be enabled for each line ofprinting by an input from the field compare unit 70 along the lines 80and 82, to thereby enable the passage of the motor step pulses from thedisk 18 through the sensing circuit 122, assuming correct steps havebeen made, to the step counter 100. Upon the counting of 12 motor steppulses for each of the four respective lines of printing, the compareunit 98 would transmit a pulse along the line through the NAND gates 84to the motor stop and detent control 114, the NAND gates 84 also havingbeen enabled by the previously mentioned pulse from the field compareunit 70.

If after printing the four lines of information in S10 spacingimmediately following the inch line, it were then desired to print twolines of information in D spacing immediately following the 7 inch lineon the form, the codes 01110 and 0100 would be entered in the fieldinstruction and line instruction portions, respectively, of the register64 for each of the desired two lines of printing, entry of the 01110code for the first line of printing creating an unequal state betweenthe field mark counter 76 and the field instruction portion of theregister, and entry of the code 0100 for each of the two lines causingthe line decoder 90 to activate the D10 line 92 to the encoder 94, theencoder 94 thereupon computing and entering in the step counter 100 avalue of 24 for the first line of printing and a value of 24 for thesecond line, such values representing the separately accumulated numberof motor steps required to produce each of the two lines of printing. Inview of the unequal state of the field mark counter 76 and the fieldinstruction portion of the register 64 during spacing for the firstline, the motor step pulses from the disk 18 would initially be blockedfrom the step counter 100 by the flip flop 168 and four pulses generatedby the field mark disk 26 would be counted by the field mark counter 76(corresponding to the 5 /2 inch,

6 inch, 6 /2 inch and 7 inch lines on the form). Upon the occurrence ofa l4-equals state of the field mark counter 76 and the field instructionportion of the register 64 a pulse would be transmitted from the fieldcompare unit 70 along the line 80 to the NAND gates 84, and along theline 82 to the flip flop 168, the NAND gates 84 not being enabled by aninput from the compare unit 98 due to the non-zero state of the stepcounter 100, the flip flop 168, however, being enabled by such pulse topermit the passage of motor step pulses from the disk 18 through thesensing circuit 122,

assuming correct steps have been made, to the step counter 100. Upon thecounting of 24 motor step pulses by the counter 100, the compare unit 98would transmit a stop pulse along the line 110 through the NAND gates 84to the motor stop and detent control 114, the NAND gates 84 beingenabled by the previously mentioned input from the field compare unit70. Advancement of the paper would accordingly be terminated for theprinting of the first line of information following the 7 inch line. Thecodes 01110 and 0100 would then be entered in the field instruction andline instruction portions, respectively, of the register 64 for theprinting of the second line of information in D10 spacing, an enablingpulse from the field compare unit 70 being immediately transmitted tothe NAND gates 84 and flip flop 168, by reason of the l4-equals state ofthe field mark counter and the field instruction portion of the register64, the motor step pulses from the disk 18 being accordingly passedthrough the sensing circuit 122, then to the flip flop 168, assuming acorrect step has been made, and finally inputted to and counted by thestep counter 100. Upon the occurrence of a zero-equals state in the stepcounter 100 representing 24 steps completed, the compare unit 98 wouldtransmit a stop pulse along the line 110 through the enabled NAND gates84 to the motor stop and detent control 114, to thereby terminate paperadvancement for the printing of the second line of information in D10spacing.

If after printing the two lines of information in D10 spacingimmediately following the 7 inch line on the form, it were then desiredto print two lines of information in S8 spacing immediately followingthe 8 inch line, the coes 10000 and 0010 would be entered in the fieldinstruction and line instruction portions, respectively, of the register64 for each of the two lines of printing, spacing for the first line ofprinting involving the initial counting of two pulses from the fieldmark disk 26 by the counter 76 (corresponding to the 7 /zinch and 3 inchlines), and the subsequent counting of 15 motor step pulses from thedisk 18 by the step counter 100 (to create a zero-equals state in thestep counter 100 representing 15 steps completed), when a l6-equalsstate occurs in the field mark counter 76 and the field instructionportion of the reegister 64, as previously described. Upon entering thecodes 10000 and 0010 for the second lines of S8 printing, the flip flop168 would be enabled immediately by an input along the line 82 resultingfrom the l6-equals state of the field mark counter 76 and the fieldinstruction portion of the register 64, the step counter 100 proceedingto count the motor step pulses from the disk 18. Upon the counting of 15additional motor step pulses by the counter 100 therein (such being thevalue computed by the encoder 94 and stored in the step counter 100 uponentry of the code 0010 for the second line of printing), a pulse wouldbe transmitted from the compare unit 98 along the line 110 through theenabled NAND gates 84 to the motor stop and detent control 114, tothereby terminate paper advancement for the printing of the second lineof information in S8 spacing.

If after printing the two lines of information in S8 spacing immediatelyfollowing the 8 inch line on the form, it were then desired to print oneline of information on the 13 inch line and one line of information inT6 spacing immediately following the 13 inch line, the codes 1 1010 and0000 would be entered in the field in struction and line instructionportions, respectively, of the register 64 for printing on the 13 inchline, and the codes 1 1010 and 1001 would be entered in the respectiveportions of the register 64 for the printing of the second line in T6spacing. Entry of the 1 1010 and 0000 codes would result immediately inthe transmission of an input pulse from the compare unit 98 to the NANDgates 84, by reason of the O-equals state of the step counter 100, thefield mark counter 76 proceeding to count 10 pulses from the field markdisk 26 (corresponding to the 8% inches, 9 inches, 9% inches, 10 inches,10% inches, 11 inches, 11% inches, 12 inches, 12% inches and 13 incheslines on the form), and the field compare unit serving to transmit apulse to the NAND gates 84 upon the occurrence of a 26-equals state inthe field mark counter 76 and the field instruction portion of theregister 64, the NAND gates 84 being thereby enabled to pass a pulse tothe motor stop and detent control 114 to terminate paper advancement forthe printing of the line of information on the 13 inches line of theform. Upon the entry of the 1 1010 and 1001 codes in the respectiveportions of the register 64, for the printing of the second line ofinformation in T6 spacing, the flip flop 168 would immediately receivean input along the line 82 from the field compare unit 70, due to the26-equals state of the field mark counter 76 and the field instructionportion of the register 64, the step counter being thereby renderedenabled to count the motor step pulses from the disk 18. Upon thecounting of 60 motor step pulses by the counter 100, such being thevalue computed by the encoder 94 and entered in the step counter 100upon activation of the T6 line 92 by the line decoder 90, a stop pulsewould be generated by the compare unit 98 and transmitted along the line110 through the enabled NAND gates 84 to the motor stop and detentcontrol 114, to thereby terminate paper advancement for the printing ofthe second line in T6 spacing.

While a preferred embodiment of the tapeless format control system hasbeen described herein in considerable detail, it will be appreciatedthat various modifications and alterations therein may be conceived bypersons skilled in the art without departing from the true spirit andscope of the invention.

What is claimed is:

l. A tapeless format control apparatus for use in a line printer forprinting on web paper, said printer having web paper handling andpositioning means associated with a printing position thereof, saidapparatus comprising:

a. a stepping motor for operatively advancing said web paper relative tosaid printing position, said motor being coupled to said web paperhandling and positioning means,

b. motor control means associated with said stepping motor and effectivefor stopping and detenting said stepping motor,

c. means for selectively determining the length of the web paper uponwhich lines of information are to be printed, such selected web paperlength constituting a selected form length,

d. means for receiving and storing externally originated print spacinginstructions,

e. a plurality of pulse generating means effective for identifying eachincrement of rotational motion of said stepping motor according to agray coded scheme, each increment of advancement of said web paper, andthe passage of each unit of selected form length, and

f. means cooperating with said motor control means and responsive tosaid print spacing instructions for controllably coordinating saidplurality of identifying pulses such that each line of informationprinted on said selected form length is properly spaced from thepreceding line and all of the lines of printed information conform to apreselected format represented by said externally originated printspacing instructions wherein said controllably coordinating meansincludes:

sensing means responsive to said pulse generating means effective foridentifying each increment of rotational motion of said stepping motorand coopcrating with said motor control means for allowing said steppingmotor to increment only upon ascertaining that its preceding incrementwas properly executed, and

first comparator means responsive to said print spacing instructions andinteracting with said motor control means for controllably retarding thespeed of said stepping motor as a print line on said web papercorresponding to said print spacing instructions approaches saidprinting position.

2. The format control apparatus defined in claim 1 wherein saidselective form length determining means comprises:

a. a plurality of gears of varying diameters fixed to a rotatable firstshaft in coaxial relationship to form a conical gear stack, each of saidgears of said stack representing a different form length,

b. an elongated cylindrical gear coupled to said web paper handling andpositioning means of said line printer, and

c. adjustable means for coupling said elongated cylindrical gear with aselected one of said plurality of gears forming said conical gear stack.

3. The format control apparatus defined in claim 2 wherein saidadjustable coupling means comprises:

a. a translatably supported toothed rack disposed intermediate and inparallel relationship relative to said elongated cylindrical gear andsaid conical gear stack,

b. an idling coupling gear rotatably mounted on the innermost extremityof said toothed rack, said coupling gear being engageably disposedrelative to said elongated gear and individual ones of said gearsforming said conical gear stack, and

c. means responsive to manual manipulation for selectively translatingsaid rack and said coupling gear relative to said elongated gear so asto cooperably couple a selected gear of said conical gear stack withsaid elongated gear.

4. The format control apparatus defined in claim 3 wherein said meansfor selectively translating said rack and said coupling gear comprises:

a. a pinion gear rotatably mounted on a rotatably second shaft inengaged relationship with the teeth of said toothed rack,

b. a third shaft gearably coupled to said second shaft,

and

c. a manually manipulatable dial member fixed to said third shaft at theend thereof opposite the end gearably coupled to said second shaft.

5. The format control apparatus defined in claim 1 wherein said meansfor receiving and storing said print spacing instructions comprises: ashift register having a field skip portion for temporarily storing abinary decimal code indicative of the number of increments of web paperadvancement that are required in an initial skipping phase thereof, anda line advance portion for storing a binary decimal code indicative ofthe number of increments of rotational motion of the stepping motor thatare required in a line advance phase of said web paper advancement.

6. The format control apparatus defined in claim 5 wherein said pulsegenerating means effective for identifying each increment of advancementof said web paper during said initial skipping phase thereof comprises:

a. a first multi-slotted disk coupled to said web paper handling andpositioning means in contiguous relationship with said elongatedcylindrical gear, and

b. a first sensing device comprised of a light emitting member and alight sensitive switch, said device being coupled to said pulsecoordinating means and disposed in cooperating relationship with saidfirst disk.

7. The format control apparatus defined in claim 6 wherein said pulsegenerating means effective for identifying each increment of rotationalmotion of said stepping motor according to said gray coded schemecomprises:

a. a second disk of two rings of multi-slots coupled to a motor shaft ofsaid stepping motor, and

b. a second sensing device comprised of at least two light emittingmembers and at least two light sensitive switches in parallel, saiddevice being coupled to said pulse coordinating means and disposed incooperating relationship with said second disk.

8. The format control apparatus defined in claim 7 wherein said pulsegenerating means effective for identifying the passage of each unit ofselected form length comprises:

a. a third slotted disk coupled to said first shaft at an extremitythereof adjacent said conical gear stack, and

a third sensing device comprised of a light emitting member and a lightsensitive switch, said device being coupled to said pulse coordinatingmeans and disposed in cooperating relationship with said third disk.

9. The format control apparatus defined in claim 6 wherein said disk isprovided with sixteen radially disposed and equally spaced-apart slots,the movement of each slot into cooperating relationship with said firstsensing device representing a one half inch increment of web paperadvancement.

10. The format control apparatus defined in claim 7 wherein said seconddisk is provided with 24 radially disposed and equally spaced-apartcoded positions per ring in gray code and said second sensing device ispro vided with two parallelly arranged light emitting members and lightsensitive switches, the movement of each of said coded positions intocooperating relationship with each of said light emitting members andlight sensitive switches representing a angular displacement of saidstepping motor as translated into a 1/120 inch increments of web paperadvancement.

11. The format control apparatus defined in claim 8 wherein said thirddisk is provided with a single radially disposed slot the movementthereof into cooperating relationship with said third sensing devicerepresenting the passage of each unit of selected form length asdelineated by said adjustable means of said selective form lengthdetermining means.

12. The format control apparatus defined in claim 8 wherein said meansfor controllably coordinating said plurality of identifying pulsescomprises:

a. first counter means associated with said first and third slotteddisks and with said first and second sensing devices,

b. second comparator means operatively coupled to said first countermeans and to said field skip portion of said register,

e. value determining means associated with and coupled to said lineadvance portion of said register,

(1. second counter means associated with said first slotted disk, saidfirst sensing device, said sensing means, and said value determiningmeans, and

e. first gating means coupled to said first and said second comparatormeans and effective for outputting a pulse to said motor control meansto thereby stop said stepping motor when both said comparator meansoutput a pulse concurrently.

13. The format control apparatus defined in claim 12 wherein said firstcounter means is resettably responsive to pulses generated by said thirdslotted disk and said third sensing device, and advanceably responsiveto pulses generated by said first slotted disk and said first sensingdevice.

14. The format control apparatus defined in claim 12 wherein said secondcounter means is resettably responsive to pulses generated by said firstslotted disk and said first sensing device and advanceably responsive ina count down sequence to pulses generated by said sensing means afterhaving been initialized by a pulse from said value determining means,said count down sequence starting at a selected initialization point andreduceably advancing from said selected point to zero.

15. The format control apparatus defined in claim 14 wherein said secondcounter means is provided with initializing means respnsive to saidvalue determining means and effective for setting said second countermeans upon the concurrent receipt of pulses from said sensing means andfrom said second comparator means.

16. The format control apparatus defined in claim 14 wherein saidsensing means comprises:

a. sensor gating means coupled to said second sensing device andeffective for decoding gray coded signals received therefrom,

b. sensor storage means responsive to initialization by said sensorgating means and effective for storing a pulse representative of thepreceding increment of advancement of said stepping motor,

c. sensor compare means coupled to said sensor gating means and saidsensor storage means and effective for outputting a pulse whenever thegray coded signal received by said sensor gating means and representingthe present step is the next correct step when compared with thepreceding step as indicated by said sensor storage means, and

(1. pulse triggering means biased by said sensor compare means andeffective upon receipt of a pulse therefrom for triggering said sensorstorage means, said second counter means and said first comparatormeans.

17. The format control system defined by claim 16 wherein said sensorgating means and said sensor compare means are NAND gates.

18. The format control system defined by claim 16 wherein said sensorstorage means and said pulse triggering means are gated flip flops.

19. The format control apparatus defined in claim 12 wherein said valuedetermining means comprises:

a. a decoder coupled to said line advance portion of said register andeffective for decoding a binary coded signal stored therein to therebyactivate a selected one of a plurality of output channels correspondingto said binary coded signal, said binary coded signal beingrepresentative of a predetermined line advance instruction, and

b. an encoder coupled to said decoder by means of said plurality ofoutput channels and coupled also to said second counter means, saidencoder being effective for computing a value representative of thenumber of incremental motor steps required to execute said predeterminedline advance instruction and to initialize said value in said secondcounter means upon the receipt of concurrent signals from said firstcomparator means and from said sensing means.

20. The format control apparatus defined in claim 19 wherein said firstcomparator means comprises:

1. A tapeless format control apparatus for use in a line printer forprinting on web paper, said printer having web paper handling andpositioning means associated with a printing position thereof, saidapparatus comprising: a. a stepping motor for operatively advancing saidweb paper relative to said printing position, said motor being coupledto said web paper handling and positioning means, b. motor control meansassociated with said stepping motor and effective for stopping anddetenting said stepping motor, c. means for selectively determining thelength of the web paper upon which lines of information are to beprinted, such selected web paper length constituting a selected formlength, d. means for receiving and storing externally originated printspacing instructions, e. a plurality of pulse generating means effectivefor identifying each increment of rotational motion of said steppingmotor according to a gray coded scheme, each increment of advancement ofsaid web paper, and the passage of each unit of selected form length,and f. means cooperating with said motor control means and responsive tosaid print spacing instructions for controllably coordinating saidplurality of identifying pulses such that each line of informationprinted on said selected form length is properly spaced from thepreceding line and all of the lines of printed information conform to apreselected format represented by said externally originated printspacing instructions wherein said controllably coordinating meansincludes: sensing means responsive to said pulse generating meanseffective for identifying each increment of rotational motion of saidstepping motor and cooperating with said motor control means forallowing said stepping motor to increment only upon ascertaining thatits preceding increment was properly executed, and first comparatormeans responsive to said print spacing instructions and interacting withsaid motor control means for controllably retarding the speed of saidstepping motor as a print line on said web paper corresponding to saidprint spacing instructions approaches said printing position.
 2. Theformat control apparatus defined in claim 1 wherein said selective formlength determining means comprises: a. a plurality of gears of varyingdiameters fixed to a rotatable first shaft in coaxial relationship toform a conical gear stack, each of said gears of said stack representinga different form length, b. an elongated cylindrical gear coupled tosaid web paper handling and positioning means of said line printer, andc. adjustable means for coupling said elongated cylindrical gear with aselected one of said plurality of gears forming said conical gear stack.3. The format control apparatus defined in claim 2 wherein saidadjustable coupling means comprises: a. a translatably supported toothedrack disposed intermediate and in parallel relationship relative to saidelongated cylindrical gear and said conical gear stack, b. an idlingcoupling gear rotatably mounted on the innermost extremity of saidtoothed rack, said coupling gear being engageably disposed relative tosaid elongated gear and individual ones of said gears forming saidconical gear stack, and c. means responsive to manual manipulation forselectively translating said rack and said coupling gear relative tosaid elongated gear so as to cooperably couple a selected gear of saidconical gear stack with said elongated gear.
 4. The format controlapparatus defined in claim 3 wherein said means for selectivelytranslating said rack and said coupling gear comprises: a. a pinion gearrotatably mounted on a rotatably second shaft in engaged relationshipwith the teeth of said toothed rack, b. a third shaft gearably coupledto said second shaft, and c. a manually manipulatable dial member fixedto said third shaft at the end thereof opposite the end gearably coupledto said second shaft.
 5. The format control apparatus defined in claim 1wherein said means for receiving and storing said print spacinginstructions comprises: a shift register having a field skip portion fortemporarily storing a binary decimal code indicative of the number ofincrements of web paper advancement that are required in an initialskipping phase thereof, and a line advance portion for storing a binarydecimal code indicative of the number of increments of rotational motionof the stepping motor that are required in a line advance phase of saidweb paper advancement.
 6. The format control apparatus defined in claim5 wherein said pulse generating means effective for identifying eachincrement of advancement of said web paper during said initial skippingphase thereof comprises: a. a first multi-slotted disk coupled to saidweb paper handling and positioning means in contiguous relationship withsaid elongated cylindrical gear, and b. a first sensing device comprisedof a light emitting member and a light sensitive switch, said devicebeing coupled to said pUlse coordinating means and disposed incooperating relationship with said first disk.
 7. The format controlapparatus defined in claim 6 wherein said pulse generating meanseffective for identifying each increment of rotational motion of saidstepping motor according to said gray coded scheme comprises: a. asecond disk of two rings of multi-slots coupled to a motor shaft of saidstepping motor, and b. a second sensing device comprised of at least twolight emitting members and at least two light sensitive switches inparallel, said device being coupled to said pulse coordinating means anddisposed in cooperating relationship with said second disk.
 8. Theformat control apparatus defined in claim 7 wherein said pulsegenerating means effective for identifying the passage of each unit ofselected form length comprises: a. a third slotted disk coupled to saidfirst shaft at an extremity thereof adjacent said conical gear stack,and a third sensing device comprised of a light emitting member and alight sensitive switch, said device being coupled to said pulsecoordinating means and disposed in cooperating relationship with saidthird disk.
 9. The format control apparatus defined in claim 6 whereinsaid disk is provided with sixteen radially disposed and equallyspaced-apart slots, the movement of each slot into cooperatingrelationship with said first sensing device representing a one-half inchincrement of web paper advancement.
 10. The format control apparatusdefined in claim 7 wherein said second disk is provided with 24 radiallydisposed and equally spaced-apart coded positions per ring in gray codeand said second sensing device is provided with two parallelly arrangedlight emitting members and light sensitive switches, the movement ofeach of said coded positions into cooperating relationship with each ofsaid light emitting members and light sensitive switches representing a15* angular displacement of said stepping motor as translated into a1/120 inch increments of web paper advancement.
 11. The format controlapparatus defined in claim 8 wherein said third disk is provided with asingle radially disposed slot the movement thereof into cooperatingrelationship with said third sensing device representing the passage ofeach unit of selected form length as delineated by said adjustable meansof said selective form length determining means.
 12. The format controlapparatus defined in claim 8 wherein said means for controllablycoordinating said plurality of identifying pulses comprises: a. firstcounter means associated with said first and third slotted disks andwith said first and second sensing devices, b. second comparator meansoperatively coupled to said first counter means and to said field skipportion of said register, c. value determining means associated with andcoupled to said line advance portion of said register, d. second countermeans associated with said first slotted disk, said first sensingdevice, said sensing means, and said value determining means, and e.first gating means coupled to said first and said second comparatormeans and effective for outputting a pulse to said motor control meansto thereby stop said stepping motor when both said comparator meansoutput a pulse concurrently.
 13. The format control apparatus defined inclaim 12 wherein said first counter means is resettably responsive topulses generated by said third slotted disk and said third sensingdevice, and advanceably responsive to pulses generated by said firstslotted disk and said first sensing device.
 14. The format controlapparatus defined in claim 12 wherein said second counter means isresettably responsive to pulses generated by said first slotted disk andsaid first sensing device and advanceably responsive in a count downsequence to pulses generated by said sensing means after having beeninitialized by a pulse from said value determining means, said countdown sequence stArting at a selected initialization point and reduceablyadvancing from said selected point to zero.
 15. The format controlapparatus defined in claim 14 wherein said second counter means isprovided with initializing means respnsive to said value determiningmeans and effective for setting said second counter means upon theconcurrent receipt of pulses from said sensing means and from saidsecond comparator means.
 16. The format control apparatus defined inclaim 14 wherein said sensing means comprises: a. sensor gating meanscoupled to said second sensing device and effective for decoding graycoded signals received therefrom, b. sensor storage means responsive toinitialization by said sensor gating means and effective for storing apulse representative of the preceding increment of advancement of saidstepping motor, c. sensor compare means coupled to said sensor gatingmeans and said sensor storage means and effective for outputting a pulsewhenever the gray coded signal received by said sensor gating means andrepresenting the present step is the next correct step when comparedwith the preceding step as indicated by said sensor storage means, andd. pulse triggering means biased by said sensor compare means andeffective upon receipt of a pulse therefrom for triggering said sensorstorage means, said second counter means and said first comparatormeans.
 17. The format control system defined by claim 16 wherein saidsensor gating means and said sensor compare means are NAND gates. 18.The format control system defined by claim 16 wherein said sensorstorage means and said pulse triggering means are gated flip flops. 19.The format control apparatus defined in claim 12 wherein said valuedetermining means comprises: a. a decoder coupled to said line advanceportion of said register and effective for decoding a binary codedsignal stored therein to thereby activate a selected one of a pluralityof output channels corresponding to said binary coded signal, saidbinary coded signal being representative of a predetermined line advanceinstruction, and b. an encoder coupled to said decoder by means of saidplurality of output channels and coupled also to said second countermeans, said encoder being effective for computing a value representativeof the number of incremental motor steps required to execute saidpredetermined line advance instruction and to initialize said value insaid second counter means upon the receipt of concurrent signals fromsaid first comparator means and from said sensing means.
 20. The formatcontrol apparatus defined in claim 19 wherein said first comparatormeans comprises: a. second gating means coupled to receive signals fromsaid second counter means and effective for outputting a plurality ofunique signals to said motor control means to thereby initiate orterminate stepping motor incrementing, b. third gating means coupled toreceive signals from said second counter means and effective foroutputting a signal when said second counter means has reached apredetermined point in its downcounting to zero, c. latching meanscoupled to said third gating means and effective for outputting a signalupon receipt of a signal therefrom, and d. braking means coupled to saidlatching means and to said sensing means and effective upon receivingconcurrent signals therefrom to output fixed and variable period signalsto said motor control means to thereby enable braking and reduced speedpowering of the stepping motor, respectively.
 21. The format controlsystem defined in claim 20 wherein said second gating means and saidthird gating means are NAND gates.
 22. The format control system definedin claim 20 wherein said latching means is a flip flop.
 23. The formatcontrol system defined in claim 20 wherein said braking means is a gateddelayed multivibrator.
 24. The format control apparatus defined in claim20 wherein said motor control means comprises sets of gatinG circuitsequal in number to the number of phases of said stepping motor, each ofsaid sets being comprised of a plurality of gates according to thenumber of functions that are to be performed by said stepping motor, theoutputs of said gating sets being ORed together to output a controlpulse upon the concurrent receipt of input pulses from said firstcomparator means and said sensing means, said output pulses serving toactivate corresponding motor drive means to thereby energize the desiredphase windings of said stepping motor.
 25. The format control systemdefined in claim 24 wherein said function gates are NAND gates.
 26. Theformat control apparatus defined in claim 19 wherein said means forcontrollably coordinating said plurality of identifying pulsesadditionally comprises: fourth gating means coupled to said thirdsensing device and to said decoder by means of a predetermined one ofsaid output channels thereof, said fourth gating means being coupledalso to a manually operable skip control unit effective for advancingsaid web paper in the absence of a binary coded signal in either saidfield skip or line advance portions of said register, the enabling ofsaid fourth gating means by a pulse generated by said third slotted diskand said third sensing device and a pulse from either said skip controlunit or said decoder being effective to output a signal to said motorcontrol means to thereby terminate said incremented movement of saidstepping motor.
 27. The format control apparatus defined in claim 26wherein said fourth gating means is comprised of NAND gates.
 28. In aweb medium control system for use in a line printer having a steppingmotor and associated web medium advancing means, said control systemincluding a shift register for storing field skip and line advancespacing instructions and a plurality of pulse generating means includingfirst means for outputting a signal when a predetermined length of theweb medium has been advanced by said advancing means, said predeterminedlength representing a selected form length, second means for outputtinga signal upon sensing each increment of web medium advancement accordingto said stored field skip spacing instruction, and third means foroutputting a signal upon sensing each increment of rotational motion ofsaid stepping motor according to said stored line advance spacinginstruction, improved means for controllably coordinating and checkingsaid plurality of pulse generating means such that each line ofinformation printed on each predetermined form length is properly spacedfrom the preceding line and all of the lines of printed informationconform to a preselected format represented by said print spacinginstructions, said improved coordinating and checking means comprising:a. a sensing circuit responsive to said third pulse generating means andcooperating with said stepping motor to permit incrementing thereof onlyupon ascertaining that the preceding increment was properly effectuated,and b. a first comparator activated by said print spacing instructionsso as to interact with said stepping motor to controllably retard thespeed thereof as a print line on said web medium corresponding to saidinstructions approaches a printing position of said line printer. 29.The improved means for controllably coordinating and checking saidplurality of pulse generating means defined in claim 28 and additionallycomprising: a. a first counter associated with said first and saidsecond pulse generating means, b. a second comparator operativelycoupled to said first counter and to a portion of said shift registereffective for storing said field skip spacing instruction, c. valuedetermining means associated with and coupled to a portion of said shiftregister effective for storing said line advance spacing instruction, d.a second counter associated with said second and said third pulsegenerating means, with said value determining means, and with saidsensing cIrcuit and said first comparator, and e. first gating meanscoupled to said first ad said second comparators and effective foroutputting a signal to said stepping motor to thereby stop said motorwhen an equals state is detected in said first and said secondcomparators.
 30. The improved coordinating means defined in claim 29wherein said first counter is resettably responsive to pulses generatedby said first pulse generating means, and advanceably responsive topulses generated by said second pulse generating means.
 31. The improvedcoordinating means defined in claim 29 wherein said second counter isresettably responsive to pulses generated by said second pulsegenerating means and advanceably responsive to pulses generated by saidsensing circuit after having been initialized by a pulse from said valuedetermining means to thereby count down from a selected initializationpoint to zero.
 32. The improved coordiating means defined in claim 29wherein said second counter further includes an intialization circuitresponsive to said value determining means to set said second counterupon simultaneous receipt of pulses from said sensing circuit and saidsecond comparator.
 33. The improved coordinating means defined in claim29 wherein said value determining means comprises: a. a decoder coupledto said line advance portion of said register and effective for decodinga binary coded signal stored therein to thereby activate a selected oneof a plurality of output channels corresponding to said binary codedsignal, said binary coded signal being representative of a predeterminedline advance spacing instruction, and b. an encoder coupled to saiddecoder by means of said plurality of output channels and coupled alsoto said second counter, said encoder being effective for computing avalue representative of the number of incremental motor steps requiredto execute said predetermined line advance instruction and to enter saidvalue in said second counter.
 34. The improved coordinating meansdefined in claim 29 wherein said sensing circuit additionally comprises:a. a sensor gating unit coupled to said third pulse generating means andeffective for decoding signals received therefrom, said signals beingcoded in incremental steps according to a gray coded scheme, b. storagemeans coupled to said sensor gating unit and effective for indicatingthe preceding increment position of said stepping motor, c. a sensorcompare unit coupled to said sensor gating unit and to said storagemeans and effective for outputting a pulse whenever the incremental stepindicated by said sensor gating unit is one step forward of theincremental position indicated by said storage means, and d. triggeringmeans coupled to receive pulses from said sensor compare unit andeffective for clock pulsing said storage means, said second counter andsaid first comparator.
 35. The improved coordinating means defined inclaim 34 wherein said sensor gating unit and said sensor compare unitare NAND gates.
 36. The improved coordinating means defined in claim 34wherein said storage means and said triggering means are gated flipflops.
 37. The improved coordinating means defined in claim 29 whereinsaid first comparator additionally comprises: a. second gating meanscoupled to receive signals from said second counter and effective foroutputting unique signals to said stepping motor when said secondcounter has or has not counted down from its initialization point tozero, to thereby prevent or enable incrementing of the stepping motor,respectively, b. third gating means coupled to receive signals from saidsecond counter and effective for outputting a signal when said secondcounter has counted down to within a fixed number of steps from its zeropoint, c. bistable means couplled to said third gatingmeans andeffective for outputting a signal upon receipt of a signal from saidthird gating means, and d. stepping motor braking meaNs coupled to saidbistable means, to said sensing circuit and to said stepping motor andeffective upon receiving concurrent signals from said bistable means andsaid sensing circuit to output fixed and variable period signals to saidstepping motor for retarding the speed thereof and for alternatelypowering and braking said stepping motor.
 38. The improved coordinatingmeans defined in claim 37 wherein said second gating means and saidthird gating means are NAND gates.
 39. The improved coordinating meansdefined in claim 37 wherein said bistable means is a flip flop.
 40. Theimproved coordinating means defined in claim 37 wherein said steppingmotor braking means is a gated delayed multivibrator.
 41. The improvedmeans for controllably coordinating and checking said plurality of pulsegenerating means defined in claim 37 and additionally comprising: fourthgating means coupled to said first pulse generating means, to saiddecoder, and to a manually operable skip control unit effective foradvancing said web medium in the absence of a print spacing instructionstored in said shift register, the enabling of said fourth gating meansby a pulse generated by said first pulse generating means a pulse fromeither said skip control unit or from said decoder being effective tooutput a signal to said stepping motor to thereby terminate theincrementing thereof.
 42. The improved coordinating means defined inclaim 41 wherein said fourth gating means are NAND gates.